Electron Multiplying Low-Voltage CCD With Increased Gain

Novel designs for the gain elements in electron multiplying (EM) CCDs have been implemented in a device manufactured in a low voltage CMOS process. Derived with help from TCAD simulations, the designs employ modified gate geometries in order to significantly increase the EM gain over traditional structures. Two new EM elements have been demonstrated with an order of magnitude higher gain than the typical rectangular gate designs, achieved over 100 amplifying stages and without an increase in the electric field. The principles presented in this work can be used in CMOS and CCD imagers employing electron multiplication in order to boost the gain and reduce undesirable effects such as clock-induced charge generation and gain ageing

Fully Depleted, Monolithic Pinned Photodiode CMOS Image Sensor Using Reverse Substrate Bias

A new pixel design using pinned photodiode (PPD) in a 180 nm CMOS image sensor (CIS) process has been developed as a proof of principle. The sensor can be fully depleted by means of reverse bias applied to the substrate, and the principle of operation is applicable to very thick sensitive volumes. Additional n-type implants under the in-pixel p-wells have been added to the manufacturing process in order to eliminate the large parasitic substrate current that would otherwise be present in a normal device. The new design exhibits nearly identical electro-optical performance under reverse bias as the reference PPD pixel it is based on, and the leakage current is effectively suppressed. The characterisation results from both front- and back-side illuminated sensor variants show that the epitaxial layer is fully depleted

Fully depleted and backside biased monolithic CMOS image sensor

We are presenting a novel concept for a fully depleted, monolithic, pinned photodiode CMOS image sensor using reverse substrate bias. The principle of operation allows the manufacture of backside illuminated CMOS sensors with active thickness in excess of 100 µm. This helps increase the QE at near-IR and soft X-ray wavelengths, while preserving the excellent characteristics associated with the pinned photodiode sensitive elements. Such sensors are relevant to a wide range of applications, including scientific imaging, astronomy, Earth observation and surveillance. A prototype device with 10 µm and 5.4 µm pixels using this concept has been designed and is being manufactured on a 0.18 µm CMOS image sensor process. Only one additional implantation step has been introduced to the normal manufacturing flow to make this device. The paper discusses the design of the sensor and the challenges that had to be overcome to realise it in practice, and in particular the method of achieving full depletion without parasitic substrate currents. It is expected that this new technology can be competitive with modern backside illuminated thick CCDs for use at visible to near-IR telescopes and synchrotron light sources

Evolution and impact of defects in a p-channel CCD after cryogenic proton-irradiation

P-channel CCDs have been shown to display improved tolerance to radiation-induced charge transfer inefficiency (CTI) when compared to n-channel CCDs. However, the defect distribution formed during irradiation is expected to be temperature dependent due to the differences in lattice energy caused by a temperature change. This has been tested through defect analysis of two p-channel e2v CCD204 devices, one irradiated at room temperature and one at a cryogenic temperature (153K). Analysis is performed using the method of single trap pumping. The dominant charge trapping defects at these conditions have been identified as the donor level of the silicon divacancy and the carbon interstitial defect. The defect parameters are analysed both immediately post irradiation and following several subsequent room-temperature anneal phases up until a cumulative anneal time of approximately 10 months. We have also simulated charge transfer in an irradiated CCD pixel using the defect distribution from both the room-temperature and cryogenic case, to study how the changes affect imaging performance. The results demonstrate the importance of cryogenic irradiation and annealing studies, with large variations seen in the defect distribution when compared to a device irradiated at room-temperature, which is the current standard procedure for radiation-tolerance testing

Pinned Photodiode Imaging Pixel With Floating Gate Readout and Dual Gain

We present an imaging pixel featuring dual conversion gain in a single exposure based on the pinned photodiode (PPD). The signal charge is first converted to voltage nondestructively using a floating gate, and a second conversion is done at a p-n junction-based sense node (SN). Higher signal dynamic range (DR) is achieved due to the sensing of the same charge with two different conversion gains. The results from a prototype 10- μ m-pitch pixel manufactured in a 180-nm CMOS image sensor process demonstrate a gain ratio of 3, DR of 90 dB, 3.6 e − rms readout noise, and negligible image lag

Modelling and testing the x-ray performance of CCD and CMOS APS detectors using numerical finite element simulations

Pixellated monolithic silicon detectors operated in a photon-counting regime are useful in spectroscopic imaging applications. Since a high energy incident photon may produce many excess free carriers upon absorption, both energy and spatial information can be recovered by resolving each interaction event. The performance of these devices in terms of both the energy and spatial resolution is in large part determined by the amount of diffusion which occurs during the collection of the charge cloud by the pixels. Past efforts to predict the X-ray performance of imaging sensors have used either analytical solutions to the diffusion equation or simplified monte carlo electron transport models. These methods are computationally attractive and highly useful but may be complemented using more physically detailed models based on TCAD simulations of the devices. Here we present initial results from a model which employs a full transient numerical solution of the classical semiconductor equations to model charge collection in device pixels under stimulation from initially Gaussian photogenerated charge clouds, using commercial TCAD software. Realistic device geometries and doping are included. By mapping the pixel response to different initial interaction positions and charge cloud sizes, the charge splitting behaviour of the model sensor under various illuminations and operating conditions is investigated. Experimental validation of the model is presented from an e2v CCD30-11 device under varying substrate bias, illuminated using an Fe-55 source

Performance of buried channel n-type MOSFETs in 0.18-μm CMOS image sensor process

Buried channel (BC) MOSFETs are known to have better noise performance than surface channel (SC) MOSFETs when used as source followers in modern Charge Coupled Devices (CCD). CMOS image sensors find increasing range of applications and compete with CCDs in high performance imaging, however BC transistors are rarely used in CMOS. As a part of the development of charge storage using BC CCDs in CMOS, we designed and manufactured deep depletion BC n-type MOSFETs in 0.18 μm CMOS image sensor process. The transistors are designed in a way similar to the source followers in a typical BC CCD. In this paper we report the results from their characterization and compare with enhancement mode and “zero-threshold” SC devices. In addition to the detailed current-voltage and noise measurements, semiconductor device simulation results are presented to illustrate and understand the different conditions affecting the channel conduction and the noise performance of the BC transistors at low operating voltages. We show that the biasing of the BC transistors has to be carefully adjusted for optimal operation, and that their noise performance at the right operating conditions can be superior to SC devices, despite their lower gain as in-pixel source followers

A CMOS TDI image sensor for Earth observation

Time Delay and Integration (TDI) is used to increase the Signal to Noise Ratio (SNR) in image sensors when imaging fast moving objects. One important TDI application is in Earth observation from space. In order to operate in the space radiation environment, the effect that radiation damage has on the performance of the image sensors must be understood. This work looks at prototype TDI sensor pixel designs, produced by e2v technologies. The sensor is a CCD-like charge transfer device, allowing in-pixel charge summation, produced on a CMOS process. The use of a CMOS process allows potential advantages such as lower power consumption, smaller pixels, higher line rate and extra on-chip functionality which can simplify system design. CMOS also allows a dedicated output amplifier per column allowing fewer charge transfers and helping to facilitate higher line rates than CCDs. In this work the effect on the pixels of radiation damage from high energy protons, at doses relevant to a low Earth orbit mission, is presented. This includes the resulting changes in Charge Transfer inefficiency (CTI) and dark signal

Point-spread function and photon transfer of a CCD for space-based astronomy

A front-illuminated development Euclid charge-coupled device (CCD) is tested to observe the CCD point-spread function (PSF) relative to signal size using a single-pixel photon transfer curve (SP-PTC) technique. In the process of generating a SP-PTC charge redistribution effects were observed. In attempting to show that charge redistribution can be caused by exposing a charge-populated well in the CCD array to further illumination, excess charge became apparent in recorded data. Excess charge is suggested to be proportionally generated in the CCD array if existing charge is subjected to further illumination before transfer and readout. The construction of an optical test bench and CCD operating variables are discussed alongside systematic error concerns and mitigation techniques

A global shutter CMOS image sensor for hyperspectral imaging

Hyperspectral imaging has been providing vital information on the Earth landscape in response to the changing environment, land use and natural phenomena. While conventional hyperspectral imaging instruments have typically used rows of linescan CCDs, CMOS image sensors (CIS) have been slowly penetrating space instrumentation for the past decade, and Earth observation (EO) is no exception. CIS provide distinct advantages over CCDs that are relevant to EO hyperspectral imaging. The lack of charge transfer through the array allows the reduction of cross talk usually present in CCDs due to imperfect charge transfer efficiency, and random pixel addressing makes variable integration time possible, and thus improves the camera sensitivity and dynamic range. We have developed a 10T pixel design that integrates a pinned photodiode with global shutter and in-pixel correlated double sampling (CDS) to increase the signal to noise ratio in less intense spectral regimes, allowing for both high resolution and low noise hyperspectral imaging for EO. This paper details the characterization of a test device, providing baseline performance measurements of the array such as noise, responsivity, dark current and global shutter efficiency, and also discussing benchmark hyperspectral imaging requirements such as dynamic range, pixel crosstalk, and image lag